The background description provided here is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Analog-to-digital converters (ADCs) convert samples of an analog input signal into digital values corresponding to the samples. Various types of ADCs are available, such as successive-approximation-register (SAR) ADCs, Sigma-Delta ADCs, and pipelined ADCs. SAR ADCs, Sigma-Delta ADCs, pipelined ADCs, and other types of ADCs include a switched-capacitor digital-to-analog converter (DAC) (“a capacitive DAC”) as a core building block.
For example, in a SAR ADC, during a conversion process, a capacitive DAC is periodically switched to generate analog voltage levels for comparison with a sampled input signal as part of a successive approximation process. Specifically, inputs of the capacitive DAC are successively switched to either a reference voltage VREF or ground, thereby demanding charge from the reference voltage VREF. The amount of charge drawn by the capacitive DAC from the reference voltage depends on the input signal (i.e., input voltage) and is a function of the code applied to the capacitive DAC during the successive approximation process. Accordingly, the capacitive DAC represents a code-dependent load that draws a code-dependent load current from the reference voltage.